1.7 – Test Intellectual Property Protection Enablement
1.7 – Test Intellectual Property Protection Enablement
Requirement Description
Verify that any Intellectual Property (IP) protection technologies provided by the chip manufacturer (e.g., secure boot, code encryption, anti-cloning features, secure debug, hardware licensing) are enabled in the DUT. If the SoC does not provide such technologies, the OEM must provide a signed declaration confirming this.
DUT Confirmation Details
OEM Statement: (Insert vendor confirmation on IP protection enablement status.)
Observed State: (Insert tester’s verification findings.)
DUT Software Details
Software Name/Version: ___________________
Build Date: ___________________
Build Number: ___________________
Hash Checksum Verification for DUT’s Software Image
Algorithm Used: SHA-256 (or equivalent approved algorithm)
Expected Hash: ___________________
Calculated Hash: ___________________
Result: Pass / Fail
DUT Configuration
(Insert configuration commands, settings, or outputs used to verify IP protection enablement.) Example:
show security ip-protection
show boot integrity-status
Pre-Conditions
The vendor shall provide the following:
Datasheet of the SoC used in the DUT.
Documentation detailing the IP protection technologies available and which are enabled in the DUT.
Signed Declaration from the OEM if no IP protection features are provided by the chip manufacturer.
Test Plan
Total Number of Test Cases: 1
Planned Test Case:
BIS-1.7.1 – Verification of Intellectual Property protection enablement via documentation review, configuration inspection, and functional validation (if applicable).
Test-bed Diagram with Interfaces and IPs
(Attach diagram showing DUT, security testing workstation, debug/management interfaces, and any secure boot or licensing validation tools used.)
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